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Using Serial Peripheral Interface (SPI) Module on PIC Microcontrollers

1. Introduction:

Serial Peripheral Interface, otherwise known as the SPI, is used to communicate data between two or more PIC microcontrollers. SPI is frequently used when few I/O lines are available, but communication between two or more devices must be fast and easy to implement. SPI is a synchronous protocol that allows a master device to initiate communication with a slave device.

Since SPI is synchronous, it has a clock pulse along with the data. RS-232 and other asynchronous protocols do not use a clock pulse, but the data must be timed very accurately. Since SPI has a clock signal, the clock can vary without disrupting the data. The data rate will simply change along with the changes in the clock rate. This makes SPI ideal when the microcontroller is being clocked imprecisely, such as by a RCoscillator.Only the master device can control the clock line, SCK and no data will be transferred unless the clock is manipulated. All slaves are controlled by the clock which is manipulated by the master device.

2. Setting up the connection:

The SPI mode allows 8-bits of data to be synchronously transmitted and received,simultaneously. All four modes of SPI are supported. To accomplish communication, typically four pins are used:

• Serial Data Out (SDO)
- RC5/SDO
• Serial Data In (SDI)
- RC4/SDI/SDA
• Serial Clock (SCK)
- RC3/SCK/SCL/LVDIN
• Slave Select (SS)
- RA5/SS/AN4
3. Advantages

Full duplex communication

Higher throughput than I²C or SMBus

Complete protocol flexibility for the bits transferred

Not limited to 8-bit words

Arbitrary choice of message size, content, and purpose

Simple hardware interfacing

Typically lower power requirements than I²C or SMBus due to less circuitry (including pullups)

No arbitration or associated failure modes

Slaves use the master's clock, and don't need precision oscillators

Slaves don't need a unique address -- unlike I²C or GPIB or SCSI

Transceivers are not needed

Uses many fewer pins on IC packages, and wires in board layouts or connectors, than parallel interfaces

At most one "unique" bus signal per device (chipselect); all others are shared 2

Figure 1: Block diagram for SPI mode on PIC

4. Enabling Serial Peripheral Interface (SPI)

To enable the serial port, SSP Enable bit, SSPEN (SSPCON1<5>), must be set. To reset or reconfigure SPI mode, clear the SSPEN bit, re-initialize the SSPCON registers, and then set the SSPEN bit. This configures the SDI, SDO, SCK, and SS pins as serial port pins. For the pins to behave as the serial port function, some must have their data direction bits (in the TRIS register) appropriately programmed. That is:

• SDI is automatically controlled by the SPI module

• SDO must have TRISC<5> bit cleared

• SCK (Master mode) must have TRISC<3> bit cleared

• SCK (Slave mode) must have TRISC<3> bit set

• SS must have TRISC<

Any serial port function that is not desired may be overridden by programming thecorresponding data direction (TRIS) register to the opposite value.

MASTER MODE

The master can initiate the data transfer at any time because it controls the SCK. The masterdetermines when the slave (Processor 2, Figure 15-2) is to broadcast data by the software protocol. In Master mode, the data is transmitted/received as soon as the SSPBUF register is written to. If the SPI is only going to receive, the SDO output could be disabled (programmed as an input). The SSPSR register will continue to shift in the signal present on the SDI pin at the programmed clock rate. As each byte is received, it will be loaded into the SSPBUF register as if a normal received byte (interrupts and status bits appropriately set).This could be useful in receiver

•
4> bit settransmitted first. In Master mode, the SPI clock rate (bit rate) is user programmable to beone of the following:FOSC/4 (or TCY)
• FOSC/16 (or 4 • TCY)

• FOSC/64 (or 16 • TCY)

• Timer2 output/2

This allows a maximum data rate (at 40 MHz) of 10.00 Mbps.
Figure 15-3 shows the waveforms for Master mode. When the CKE bit is set, the SDO data is valid before there is a clock edge on SCK. The change of the input sample is shown based on the state of the SMP bit. The time when the SSPBUF is loaded with the received data is shown.
SPI MODE WAVEFORM (MASTER MODE)

6. SLAVE MODE

In Slave mode, the data is transmitted and received as the external clock pulses appear on SCK. When the last bit is latched, the SSPIF interrupt flag bit is set. While in Slave mode, the external clock is supplied by the external clock source on the SCK pin. This external clock must meet the minimum high and low times as specified in the electrical specifications. While in SLEEP mode, the slave can transmit/receive data. When a byte is received, the device will wake-up from sleep.

SPI MODE WAVEFORM (SLAVE MODE)
7. SLAVE SELECT SYNCHRONIZATION

The SS pin allows a Synchronous Slave mode. The SPI must be in Slave mode with SS pin control enabled (SSPCON1<3:0> = 04h). The pin must not be driven low for the SS pin to function as an input. The Data Latch must be high. When the SS pin is low, transmission and reception are enabled and the SDO pin is driven. When the SS pin goes high, the SDO pin is no longer driven, even if in the middle of a transmitted byte, and becomes a floating output.External pull-up/ pull-down resistors may be desirable, depending on the application. When the SPI module resets, the bit counter is forced to 0. This can be done by either forcing the SS pin to a high level or clearing the SSPEN bit. To emulate two-wire communication, the SDO pin can be connected to the SDI pin. When the SPI needs to operate as a receiver the SDO pin can be configured as an input. This disables transmissions from the SDO. The SDI can always be left as an input (SDI function), since it cannot create a bus conflict.

8. FLOWCHART FOR SPI COMMUNICATION
Flowchart for SPI communication (Master and Slave PIC)

Master Slave

9. PROGRAMMING CODE

Master Code:

#include <18f452.h>

#fuses EC,NOLVP,NOWDT,NOPROTECT

#device ADC=8

#use delay(clock=40000000)

//These define the different SPI modes in terms of constants the compiler

knows about

//NOTE: our PICs only seemed to work in modes 1 and 3, though they are

supposed to work with any modes

#define SPI_MODE_0 (SPI_L_TO_H | SPI_XMIT_L_TO_H)

#define SPI_MODE_1 (SPI_L_TO_H)

#define SPI_MODE_2 (SPI_H_TO_L)

#define SPI_MODE_3 (SPI_H_TO_L | SPI_XMIT_L_TO_H)

#define SS_PIN PIN_D0 //this can be any output pin on the master

void main()

{

int val;

//Set up the ADC to read from A0

setup_adc_ports(AN0);

setup_adc(ADC_CLOCK_INTERNAL);

set_adc_channel(0);

//The next statement sets up the SPI hardware, with this PIC as a master

using mode 1

//SPI_CLK_DIV_64 sets the speed of the SPI clock pulses--this is the

slowest speed

setup_spi(SPI_MASTER | SPI_MODE_1 | SPI_CLK_DIV_64);

while(true) {

val = read_adc(); //read the value to be sent

output_low(SS_PIN); //pull the slave select line low to select

the slave

delay_us(10); //give the slave time to notice this (may be

unnecessary)

spi_write(val); //send the value

delay_us(10); //(may be unnecessary)

output_high(SS_PIN); //deselect the slave.

delay_ms(10);

}

}

8

Slave Code:

#include <pic.h>

#fuses EC,NOLVP,NOWDT,NOPROTECT

#use delay(clock=40000000)

#include <LCD.C>

#define SPI_MODE_0 (SPI_L_TO_H | SPI_XMIT_L_TO_H)

#define SPI_MODE_1 (SPI_L_TO_H)

#define SPI_MODE_2 (SPI_H_TO_L)

#define SPI_MODE_3 (SPI_H_TO_L | SPI_XMIT_L_TO_H)

void main()

{

setup_spi(SPI_SLAVE | SPI_MODE_1); //set up SPI hardware as a slave in

mode 1

lcd_init();

while(true) {

val = spi_read(0); //spi_read must be passed an argument. The

argument value is sent

//back to the master whenever the master sends us

a message again.

//This allows two-way communication, but here the

master ignores

//whatever the slave sends back, so just send a

0.

//display the value read:

lcd_gotoxy(1, 1);

printf(lcd_putc, "Pot at: %u ", val);

}

}

10. REFERENCE

- PIC18F452, PIC16F877A and PIC16F88 user manual datasheet

- Martin Bates,

Simulations,

- PICmicro Mid-Range MCU Family Reference Manual, Microchip, 1997
Interfacing PIC Microcontrollers – Embedded Design by InterativeElsevier, 2006.